1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device for optionally selecting the correspondence between a chip-select signal and address space.
2. Description of the Related Art
Recently, it has been desired to decrease the size, power consumption, and price of an entire computer system as computer-storage products are downsized. Therefore, it is desirable to decrease the number in chips in the entire computer system.
A semiconductor integrated circuit device (chip-select address decoder) according to the prior art comprises address decoder sections corresponding to a plurality of memory chips and each address decoder section has a register, a comparator circuit, a selection gate, and a control circuit. The comparator circuit compares predetermined addresses from among all addresses supplied from a CPU with addresses previously set in the register and outputs a chip-select signal when the addresses coincide.
An initial region for storing an initial program (initial routine) is assigned to a memory chip and, for example, a user region for storing a user program (application program) is assigned to the same memory chip. For a semiconductor integrated circuit device according to the prior art, it is impossible to assign two or more separate address spaces to one memory chip. Therefore, when an address requiring the initial routine for resetting the CPU is separate from an address of the user program, the addresses cannot be stored in one memory chip.